Intel recently held an Architecture Day in California to give an outline for their plans covering 2019 to 2021. They talked about a new CPU architecture, Sunny Cove, touched on 10nm and also talked about 3D Packaging technology they have named Foveros.
There were plenty of other topics of conversation but perhaps the most interesting observation was that the host of the event was Raja Koduri, recently in charge of the Radeon Technology Group at AMD. Standing alongside Koduri was Jim Keller who developed the Zen architecture for AMD which is used in the current Ryzen 7, Threadripper and EPYC CPUs.
Koduri and Keller have previously worked together at Apple so the message here is that Intel is prepared to use outsiders for fresh ideas to find a way out of the current rut where they have been effectively unable to produce CPUs using a 10nm fabrication process.
It wasn’t all about new people as Ronak Singhal the Chief Core Architect is an Intel Fellow and has worked at Intel for about 25 years. Singhal made a number of points about the current Core architecture and the way the Maximum Turbo Frequency has increased from the original 4.2GHz on a single core and has now reached 5.0GHz on four cores. In other words they may have been stuck on a 14nm fabrication process for a number of years but that doesn’t mean that progress has stood still.
The Sunny Cove Microarchitecture is a curious thing as Intel hasn’t previously separated Microarchitecture from the overall technology that is used inside a new CPU. This suggests Intel is breaking the CPU down into chunks, possibly in a similar approach to that used by AMD with Zen/Ryzen.
When we see the next Core CPU, very likely in H2 2019, we are expecting it will be fabricated at 10nm, will be code named Ice Lake and will use Sunny Cove cores, however that tells us nothing about the number of cores, the clock speed or the TDP.
Intel talked about 3D Stacking for logic chips in a process they have named Foveros that will use an active interposer, as opposed to EMIB which is a dumb interconnect. The idea is that Foveros can be used to connect blocks of different types of transistor together. It is tempting to see this as a version of AMD’s approach of using chiplets. In Zen this is merely two identical CPU chiplets that have been joined using HyperTransport. A Raven Ridge APU is slightly more complicated as you are joining one CPU chiplet with one GPU chiplet, however the imminent Rome EPYC server CPU is a completely different proposition. Here we have a central IOX chip fabricated at 14nm that is surrounded by eight CPU chiplets that are fabricated at 7nm.
With Foveros Intel will be able to stack chips that are manufactured at 10nm, 7nm and 14nm, instead of laying them out horizontally and connecting them together.
Intel’s example of Foveros shows a low power chip that looks like the sort of hardware you find inside a NUC, rather than a gaming PC. If Intel intends to vertically stack chips with significant TDPs we have to wonder how they intend to cool the silicon at the bottom of the stack.
Intel also talked about integrated graphics where they will skip from Gen. 9 to Gen. 11 which is another way of saying that Gen. 10 has been scrapped along with the Cannon Lake family of CPUs. The implication here is that Koduri has pushed for Intel to make a significant jump in the power of their graphics, instead of making yet another incremental change. The single most interesting thing we saw here was the inclusion of a dedicated block of hardware to handle HEVC.
Intel’s graphics roadmap shows that beyond Gen. 11 they have something called Xe lined up, whatever the heck that might be. On the other hand the much-touted discrete GPU was only mentioned in passing without any detail.
There are two distinct ways you can ingest this information while you read the slides in the presentations. The negative way is that Intel has very little good news on the immediate horizon and hopes to start delivering products using Sunny Cove cores during 2019. Their recent record for delivering new products is not good and we have to wait and see whether or not Intel is able to deliver on their warm words and vague promises.
If we close on a more optimistic note we could take the view that Intel is aware they have had problems over the past two years with 10nm. Furthermore they seem to be aware their historic approach of using monolithic CPU dies has come to the end of the line. Intel is a complicated company with a fifty year history and it is taking them some while to turn the ship around.
We don’t expect to see much new from Intel at CES in January however we need to see solid progress from the company in 2019, in particular with delivery of 10nm. The clock has been ticking for a good long while however Intel still has time to snatch victory from the jaws of defeat.